The eSagu project has been awarded the Diploma for Excellence in the prestigious Stockholm Challenge 2008 for IT in Economic Development.
The eSagu project has been awarded the Diploma for Excellence in the prestigious Stockholm Challenge 2008 for IT in Economic Development.
The eSagu project won the Manthan Award 2007 and CSI-Nihilent award 2006.
The eSagu project won the Manthan Award 2007 and CSI-Nihilent award 2006.
Four B.Tech students secured 11th rank worldwide on a popular website www.spoj.pl that posts programming problems.
Four B.Tech students secured 11th rank worldwide on a popular website www.spoj.pl that posts programming problems.
Team IIIT-H was among the finalists in Intel India student research contest.
Team IIIT-H was among the finalists in Intel India student research contest.
IIIT-H student was among the top 5 Indians finalists in Indian Student Mathematica Competition.
IIIT-H student was among the top 5 Indians finalists in Indian Student Mathematica Competition.
IIIT-H team won First Place in Document Understanding Contest (DUC-2006) run by NIST, USA.
IIIT-H team won First Place in Document Understanding Contest (DUC-2006) run by NIST, USA.
IIIT-H team won the shared task contest as part of the workshop on Shallow Parsing of IJCAI-07.
IIIT-H team won the shared task contest as part of the workshop on Shallow Parsing of IJCAI-07.
A research paper from IIIT-H was awarded the Best Student Paper Award in IEEE International Services Computing Conference held at Salt Lake City, Utah, USA.
A research paper from IIIT-H was awarded the Best Student Paper Award in IEEE International Services Computing Conference held at Salt Lake City, Utah, USA.
IIIT-H team won First Prize at the Intel India Student Research Challenge (IIISRC) for the year 2006 – 2007. This recognition was for their research on Design of a high speed 32-bit arithmetic and logic unit.
IIIT-H team won First Prize at the Intel India Student Research Challenge (IIISRC) for the year 2006 – 2007. This recognition was for their research on Design of a high speed 32-bit arithmetic and logic unit.
IIIT-H’s VLSI team is one of the three first-prize winners for a research proposal on Power reduction in off-chip buses for block data at the National Level Intel Scholar Program 2008 (in Graduate category; Feb 2009).
IIIT-H’s VLSI team is one of the three first-prize winners for a research proposal on Power reduction in off-chip buses for block data at the National Level Intel Scholar Program 2008 (in Graduate category; Feb 2009).