IIIT Hyderabad has announced suspension of the course work with immediate effect on 14th-March-2020 and has made it mandatory for all undergraduate students (first year to fourth year batches) and postgraduate students (MTech first and second year batches) doing only course work to return home by 18th-March-2020; research students (MS, PhD and Dual Degree students registered for thesis credits) can choose to stay and continue their research work. Institute will announce plans for finishing the Spring semester's coursework by 20th-March-2020.

Head / Manager - ECE Lab

Head / Manager - ECE Lab

IIIT Hyderabad is looking for competent hardware design engineers who can work independently in research labs and funded research projects and also lead a team of lab assistants

Pre-Requisites:

B.E/B.Tech in ECE with 5 years or more experience in embedded systems design

               - Implementation and troubleshooting such as Arduino like micro controllers

               -  Expertise in Verilog and System Verilog based design

               -  FPGA design fundamentals

Proficiency in analog and digital circuit design, breadboarding, implementation and troubleshooting.

Proficiency in PCB design

Shares most of the load of faculty by designing new experiments using hardware / module and circuit levels, etc..

Interfaces between faculty and staff.

Train lab personnel in latest technology upgrades and to overall enhance their knowledge and skills level.

Good interpersonal and team playing skills.

Compensation: In line with MHRD 7th CPC guidelines

Apply with your detailed resume at staff.recruitment@iiit.ac.in

Last date to apply : 8th Feb 2020

 

Page last updated on January, 2020