CVEST

From Msplacements

Center for VLSI and Embeded Systems Technology(CVEST) Visit Center's Homepage

The Center pursues research in areas of VLSI, Microelectronics and Embedded Systems. Our activities are focused on conceiving device architecture and exploring circuit configurations techniques for embedded systems. We collaborate with industry to keep some of our research focus on real-world problems.

Some current research areas

• Low Power VLSI Design
• Design for Testability
• Self healing circuits
• Analog and mixed signal design
• Test and Verification of long scale VLSI designs
• Multicore (Processor) architecture for Embedded Systems
• ME, MS and MEMTRONICS
• Functional approach to micro electronics

The Centre works in close collaboration with organizations such as Cypress Semiconductors, Portal Player, and ANURAG (Defence Laboratory). Postgraduate students are encouraged to take up investigations in allied microelectronics areas like super conductive devices, nanomaterial based devices, and composite material based devices.

Faculty
R Govindarajulu(Head), RN Biswas, Satyam Mandavilli, JVR Ravindra

Students
Immediate Availability: Available In 1-2 Months
Short Term Availability: Available in 3-6 Months
Research Ongoing: Available after 6 months
Placed: Not Available

	Mamatha
	Programme: PhD in ECE
	Join: July 2006
	Status: Immediate
	Thesis Topic: Energy Efficient SRAM
	Research Interests: Semiconductor Memories, Low power circuit design, Hardware software Co-design, Process variation tolerant design, energy recovery systems
	E-mail: mamatha@research.iiit.ac.in
	Contact No: +91 9849443411
	URL: http://new.iiit.ac.in/msplacements/index.php/Mamatha

	R.Swathi
	Programme: MS by Research (PG)
	Join: December 2007
	Status: Short term Availability
	Thesis Topic: Design of Interface Circuit for MEMS based Capacitive Accelerometers, Gyroscopes.
	Research Interests: Analog and Mixed signal design, Noise Modeling in Analog circuits.
	E-mail: swathireddy@research.iiit.ac.in
	Contact No: +91 9949670624
	URL: http://new.iiit.ac.in/msplacements/index.php/swathireddy

	Suresh Kumar Varanasi
	Programme: MS by Research (PG)
	Join: August 2008
	Status: Short Term Availability
	Thesis Topic: Use of Input rise times as a measure to counter the effect of process variations on SRAM cells
	Research Interests: Analog and mixed signal design, Low power circuits, Process variations in Register files
	E-mail: suresh.varanasi@research.iiit.ac.in
	Contact No: +91 9032321250
	URL:http://iiit.ac.in/msplacements/index.php/User:Suresh.varanasipg08

	Sumit Raj
	Programme: MS by Research (Dual Degree)
	Join: July 2006
	Status: Short Term Availability
	Thesis Topic: Fault Diagnostics and Testing of ASICs and FPGAs
	Research Interests: ASIC design and Verification, ASICs synthesis, FPGA testing
	E-mail: sumit.raj@research.iiit.ac.in
	Contact No: +91 9989489704
	URL: http://web.iiit.ac.in/~sumitraj

	A. Padma Sravani
	Programme: MS by Research (PG)
	Join: August 2008
	Status: Short Term Availability
	Thesis Topic: Impact of process variations on Issue Queue
	Research Interests: Process variations in issue queue and CAM cells, Analog and mixed signal design, Fault tolerant circuits
	E-mail: padmasravani.a@research.iiit.ac.in
	Contact No: +91 9441336698
	URL: http://iiit.ac.in/msplacements/index.php/Padma_Sravani

	Pradeep Kumar Sana
	Programme: MS by Research (Dual Degree)
	Join: July 2005
	Status: Short Term Availability
	Thesis Topic:
	Research Interests: Digital circuits designing, Low power circuits, Secure logic styles.
	E-mail: pksana@research.iiit.ac.in
	Contact No: +91 9441589811
	URL: http://new.iiit.ac.in/msplacements/index.php/Pradeep_Kumar_Sana

	Ananth Krishna Karthik N
	Programme: MS by Research (Dual Degree)
	Join: July 2005
	Status: Short Term Availability
	Thesis Topic:
	Research Interests: Digital circuits Design, Computer Architecture, FPGA-Based circuit design, Software Defined Radios
	E-mail: akkarthik@research.iiit.ac.in
	Contact No: +91 9885495224
	URL: http://new.iiit.ac.in/msplacements/index.php/akkarthik

	Akshay Kumar Salimath
	Programme: MS by Research (PG)
	Join: July 2007
	Status: Short Term Availability
	Thesis Topic: Over-voltage and ESD Design and Protection Issues at the I/O Pad
	Research Interests: Low Power Design, I/O Design ,Device Modeling, Analog & Mixed signal Design
	E-mail: salimath@research.iiit.ac.in
	Contact No: +91 9912069440
	URL: http://new.iiit.ac.in/msplacements/index.php/Akshay_Kumar_Salimath

	Anshul Agarwal
	Programme: MS by Research (Dual Degree)
	Join: July 2004
	Status: Placed
	Thesis Topic: Design of 8 bit current steering DAC with integrated power supply
	Research Interests: Analog and Mixed Signal Design, Low Power Circuit Design, High Speed D/A Converters
	E-mail: anshulagarwal@research.iiit.ac.in
	Contact No: +91 9885968393
	URL: http://new.iiit.ac.in/msplacements/index.php/Anshul_Agarwal

	Sandeep Saini
	Programme: MS by Research (Dual Degree)
	Join: July 2004
	Status: Placed
	Thesis Topic: An alternate approach to "Buffer Insertion" for delay, noise, area and power reduction in interconnects
	Research Interests: Delay reduction, Crosstalk noise avoidance, Low power system design, High-speed circuit design
	E-mail: saini_sandeep@research.iiit.ac.in
	Contact No: 91 9177613955
	URL: http://new.iiit.ac.in/msplacements/index.php/Sandeep_Saini

	Nayan Mujadiya
	Programme: MS by Research (PG)
	Join: December 2006
	Status: Immediate Availability
	Thesis Topic: Instruction Scheduling for VLIW Processor under Variation Scenario
	Research Interests: Multi-core / Computer Architecture, Compiler Optimization, Parallel computing
	E-mail: nayan_mujadiya@students.iiit.ac.in
	Contact No: +91 96766 45111
	Homepage: http://research.iiit.ac.in/~nayan_mujadiya

	Prashanth Paramahans
	Programme: MS by Research (PG)
	Join: July 2007
	Status: Placed
	Thesis Topic: Design of Static, transistor based non-differential input adiabatic logic circuits
	Research Interests: Low Power Circuits, Design and Layout of Analog & Mixed signal Circuits, SRAM Memory Design
	E-mail: manik@research.iiit.ac.in
	Contact No: +91 9908297385
	URL: http://new.iiit.ac.in/msplacements/index.php/Prashanth_Paramahans

	Abinesh
	Programme: MS by Research (PG)
	Join: July 2007
	Status: Placed
	Thesis Topic: Design for low power consumption on buffered memory systems
	Research Interests: Off-Chip Bus Coding, Multi-core Architectures, Software Defined Radio
	E-mail: abinesh@research.iiit.ac.in
	Contact No: +91 9963138742
	URL: http://new.iiit.ac.in/msplacements/index.php/Abinesh